Prashant J. Nair

Prashant J. Nair

Memory Systems Architect

Associate Professor, The University of British Columbia

KAIS 4014, 2332 Main Mall
Vancouver, BC V6T 1Z4, Canada

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Biography

Dr. Nair is an Associate Professor at the University of British Columbia (UBC), where he directs the Systems and Architectures (STAR) Lab, and a memory architect at d-Matrix. He is an Associate Editor of IEEE Computer Architecture Letters, General Co-Chair of ISCA 2027, and an Affiliate Fellow at the Quantum Algorithms Institute.

His research sits at the intersection of computer architecture, advanced memory systems, and ML systems, with a focus on improving efficiency for modern AI and high-performance computing. He has contributed to 40+ top-tier publications in venues including ISCA, MICRO, HPCA, ASPLOS, DSN, SC, NeurIPS, ICML, MLSys, and VLDB.

Watch

Scaling the Memory Wall Seminar at ETH Zürich · 2026 Why AI inference is limited by memory bandwidth, and how Raptor’s stacked 3D-DRAM gets past it.
Why PC Memory is Stuck in 1995 Interview on Techquickie · 2026 Techquickie interviewed me on why PCs split CPU and GPU memory, and what unifying it changes.

All talks and slidesSee how 3D-DRAM works

Major Awards

Recognition

  • Hall of Fame member of ISCA, MICRO, and HPCA Inducted into all three as an Assistant Professor 2024–25
  • Three IEEE Micro Top Picks honorable mentions 2016, 2019, 2025

Industry Impact

Latest Updates

Office

KAIS 4014, 2332 Main Mall
Vancouver, BC V6T 1Z4, Canada